Flyby Transfer; Example Of Flyby Transfer (Memory To I/O) - Renesas NU85E Preliminary User's Manual

32-bit microprocessor core
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7.9.2 Flyby transfer

A flyby transfer can be executed only when the MEMC supports flyby transfers.
Flyby transfer executes a transfer from memory to I/O or from I/O to memory in one cycle. The NU85ET always
outputs the address on the memory side set in the DSAnH or DSAnL registers for either transfer from memory to I/O
or from I/O to memory (n = 3 to 0).
The strobe signal to the memory or to the external I/O simultaneously makes the RDZ/IOWRZ signals and
WRZ/IORDZ active during transfer from memory to I/O and from I/O to memory, respectively. Signals indicating DMA
flyby transfer (1, 1, 1) are also output from the VMCTYP2 to VMCTYP0 pins. Only the data bus on the memory side
of the memory controller is used for data, so the VBDI31 to VBDI0 and VBDO31 to VBDO0 signals, which are for
VSB data, are not used.
The external I/O is selected according to the DMACTV3 to DMACTV0 signals.
Caution When NA85E535 is used as a memory controller, flyby transfer with SDRAM is possible, except in
a system in which the SDRAM controller (NT85E502) is connected to the NT85E500.
NU85E
VDCSZn
VMA25 to VMA0
VMCTYP2 to VMCTYP0
DMACTVn
Remark n = 7 to 0
174
CHAPTER 7 DMAC
Figure 7-25. Example of Flyby Transfer (Memory to I/O)
NT85E500
VDCSZn
VBA25 to VBA0
VBCTYP2 to VBCTYP0
Preliminary User's Manual A14874EJ3V0UM
A25 to A0
CSZn
RDZ
IOWRZ
Memory
(transfer source)
A
D
CS
OE
I/O
(transfer destination)
D
WE
CS

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