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(f)
ROMTYPE (input)
This is an NEC reserved pin. Always input a low level.
(g) DCOP13 to DCOP0 (output)
These are NEC reserved pins. Leave them open.
(3) NU85E connection pins
(a) VBCLK (input)
This is the system clock input pin.
(b) DBI5 to DBI0 (output)
These are debug control output pins. Connect them to pins DBI5 to DBI0 on the NU85E.
(c) DBO14 to DBO0 (input)
These are debug control input pins. Connect them to pins DBO14 to DBO0 on the NU85E.
(d) DBB15 to DBB0 (I/O)
These are debug control I/O pins. Connect them to pins DBB15 to DBB0 on the NU85E.
(e) TMODE1 (input)
This is the test mode selection input pin. Connect it to the TMODE1 pin on the NU85E.
(f)
VBWAIT (input)
This is the wait response input pin.
(g) DCRESZ (output)
This is the reset output pin. Connect it to the DCRESZ pin on the NU85E.
(h) DCSTOPZ (output)
This is the hardware STOP mode request output pin. Connect it to the DCSTOPZ pin on the NU85E.
(i)
DCNMI2 to DCNMI0 (output)
These are non-maskable interrupt output pins. Connect them to pins DCNMI2 to DCNMI0 on the NU85E.
(j)
DCVAREQ (output)
This is the bus access right request output pin. Connect it to the VAREQ pin on the NU85E.
(k) VBTCLK (input)
This is the test clock input pin. Connect it to the VPTCLK pin on the NU85E.
CHAPTER 10 NB85E901
Preliminary User's Manual A14874EJ3V0UM
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