Example Of Flyby Block Transfer Timing (From External Sram To External I/O Connected To Nt85E500) - Renesas NU85E Preliminary User's Manual

32-bit microprocessor core
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Figure 7-40. Example of Flyby Block Transfer Timing (from External SRAM to External I/O Connected to NT85E500)
VMA27 to VMA0 (Output)
VBDI31 to VBDI0 (Input)
VBDO31 to VBDO0 (Output)
VMBENZ3 to VMBENZ0
VMCTYP2 to VMCTYP0
A25 to A0 (Output) Note
DI31 to DI0 (Input) Note
DO31 to DO0 (Output) Note
WRZ3 to WRZ0 (Output) Note
CSZ7 to CSZ0 (Output) Note
Note These are NT85E500 signals.
1st
2nd
T1
T2
T1
T2
T3
VBCLK (Input)
VMTTYP1, VMTTYP0
0H
2H
2H
3H
2H
2H
3H
(Output)
L
L
VMSTZ (Output)
VMWRITE (Output)
L
FH
(Output)
(Output)
VMSEQ2 to VMSEQ0
(Output)
VMSIZE1, VMSIZE0
(Output)
VMLOCK (Output)
L
VBDC (Output)
VBDV (Output)
L
VDCSZ7 to VDCSZ0
FFH
(Output)
VMWAIT (Input)
VMAHLD (Input)
L
VMLAST (Input)
L
DMARQn (Input)
DMACTVn (Output)
DMTCOn (Output)
L
RDZ (Output) Note
FFH
IORDZ (Output) Note
H
IOWRZ (Output) Note
3rd
4th
5th
6th
T1
T2
T1
T2 T3
T1
T2
T1
T2
T3
T3
T3
T3
2H
2H
3H
2H
2H
3H
2H
2H
3H
2H
2H
3H
0H
7H
0H
2H
FBH
FH
FBH
7th
8th
T1
T2
T1
T2
T3
T3
2H
2H
3H
2H
2H
3H
0H
FH
FFH
FFH

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