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8.4 Software Exception
A software exception, which is an exception that is generated when the CPU executes the TRAP instruction, can
always be acknowledged.
8.4.1 Operation
If a software exception is generated, the CPU performs the following processing and shifts control to the handler
routine.
<1> Save the restored PC in the EIPC.
<2> Save the current PSW in the EIPSW.
<3> Write the exception code in the lower 16 bits (EICC) of the ECR (interrupt source).
<4> Set the EP and ID bits of the PSW.
<5> Set the handler address (00000040H or 00000050H) for the software exception in the PC and shift control.
Figure 8-12 shows the processing format of software exception processing.
Note The TRAP instruction format is "TRAP vector" (where vector is a value from 0 to 1FH).
The handler address is determined by the TRAP instruction operand (vector). When vector is 0 to 0FH, the
address is 00000040H. When vector is 10H to 1FH, the address is 00000050H.
CHAPTER 8 INTC
Figure 8-12. Software Exception Processing Format
CPU processing
EIPC
EIPSW
ECR.EICC
PSW.EP
PSW.ID
PC
Preliminary User's Manual A14874EJ3V0UM
Note
TRAP instruction
←
Restored PC
← PSW
← Exception
code
← 1
← 1
← Handler
address
Exception processing
225
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