Maskable Interrupt Processing Format - Renesas NU85E Preliminary User's Manual

32-bit microprocessor core
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Figure 8-4. Maskable Interrupt Processing Format
INTC
acknowledgement
higher than that of interrupt
higher than that of other
priority of interrupt requests
Maskable interrupt request
CPU processing
EIPC
EIPSW
ECR.EICC
PSW.EP
PSW.ID
PC
Preliminary User's Manual A14874EJ3V0UM
CHAPTER 8 INTC
INTn input
No
Interrupt request?
Yes
No
Interrupt
unmasked?
Yes
Priority
No
currently processed?
Yes
Priority
No
interrupt request?
Yes
Highest default
No
with same priority?
Yes
1
PSW.NP
0
1
PSW.ID
0
Restored PC
← PSW
← Exception
code
← 0
← 1
← Handler
address
Interrupt service
Interrupt request pending
Interrupt service pending
215

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