Renesas NU85E Preliminary User's Manual page 253

32-bit microprocessor core
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INTM ...................................................................... 137
IR ................................................................... 152, 154
IRAMA27 to IRAMA2 ............................................... 37
IRAMEN ................................................................... 37
IRAMRWB................................................................ 37
IRAMWR3 to IRAMWR0 .......................................... 37
IRAMWT .................................................................. 37
IRAMZ31 to IRAMZ0................................................ 37
IRAOZ31 to IRAOZ0 ................................................ 37
IROMA19 to IROMA2 .............................................. 36
IROMAE................................................................... 36
IROMCS................................................................... 36
IROMEN................................................................... 36
IROMIA .................................................................... 36
IROMWT .................................................................. 36
IROMZ31 to IROMZ0............................................... 36
IRRSA...................................................................... 40
ISPR ...................................................................... 223
ISPR7 to ISPR0 ..................................................... 223
[L]
Line transfer mode................................................. 169
[M]
Maskable interrupt priorities................................... 217
Maskable interrupts ............................................... 214
Memory banks ......................................................... 74
MLEn ..................................................................... 159
[N]
NB85E901 ............................................................. 234
NB85E901 and NU85E connection example ......... 243
Next address setting function ................................ 162
NMI ........................................................................ 209
NMI0M ................................................................... 137
NMI1M ................................................................... 137
NMI2M ................................................................... 137
Non-maskable interrupts........................................ 209
Normal mode ......................................................... 230
NP............................................................................ 57
NPB ......................................................................... 17
NPB strobe wait control register ............................ 123
N-Wire type IE connection ..................................... 244
[O]
On-chip debugging .................................................. 73
OV............................................................................ 57
APPENDIX B INDEX
[P]
PA13 to PA00...................................................85, 121
PA15 ................................................................85, 121
PC ......................................................................53, 54
Periods when interrupts cannot be
acknowledged ........................................................229
Peripheral I/O area ...................................................65
Peripheral I/O area select control register........85, 121
Peripheral I/O registers ............................................67
PHEVA .....................................................................44
PHTDIN1, PHTDIN0.................................................44
PHTDO1, PHTDO0 ..................................................44
PHTEST ...................................................................45
PIC0 to PIC63 ........................................................221
PIFn........................................................................221
Pin functions.............................................................25
Pin status .................................................................48
PMKn..............................................................221, 222
Power save control register....................................137
Power save function...............................................136
PPRn2 to PPRn0....................................................221
PRCMD ..................................................................139
Program area ...........................................................59
Program counter.................................................53, 54
Program registers.....................................................53
Program status word ..........................................55, 57
Programmable chip select function ..........................77
Programmable peripheral I/O area.........................120
Programmable peripheral I/O area selection
function.....................................................................83
PSC ........................................................................137
PSW ...................................................................55, 57
[R]
r0 to r31....................................................................53
RAM .........................................................................18
RAM area .................................................................64
RCU interface...........................................................73
Recommended connection of unused pins ..............46
REG7 to REG0.......................................................139
Retry function .........................................................125
ROM .........................................................................18
ROM area.................................................................62
ROM relocation function...........................................62
ROM/RAM access timing .......................................247
[S]
S...............................................................................57
Preliminary User's Manual A14874EJ3V0UM
251

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