Hardware Stop Mode - Renesas NU85E Preliminary User's Manual

6.5 Hardware STOP Mode

In hardware STOP mode, the CPU operation clock and the clock generator are stopped. The overall system is
stopped, and ultra-low power consumption is achieved in which only leak current is lost.
(1) Setting and operation status
The NU85E is switched to hardware STOP mode by inputting a low-level signal to the DCSTOPZ pin. The
NU85E is switched to hardware STOP mode even if a low-level signal is input to the DCSTOPZ pin when the
NU85E is in HALT mode or software STOP mode.
Although program execution stops in hardware STOP mode, the contents of all registers and of RAM
immediately before hardware STOP mode began are maintained. The operation of all NU85E-internal peripheral
I/O is also stopped.
Remark The NU85E may not switch to hardware STOP mode correctly if the DCSTOPZ input becomes active
(low level) due to a read modify write, misalign access, etc. while the VMLOCK signal is locked. If the
DCSTOPZ input becomes low level in the bus lock state, an internal CPU of the NU85E is stopped,
but the HWSTOPRQ signal, which controls the external clock generator, does not become active
because the slave device connected to the locked bus may require clock supply. Consequently, clock
is not stopped and the NU85E will not switch to hardware STOP mode.
If the system must be switched to hardware STOP mode when the DCSTOPZ input is low level, mask
the DCSTOPZ input by the VMLOCK signal to avoid switching to hardware STOP mode while the bus
is locked.
(2) Cancellation of hardware STOP mode
Hardware STOP mode is canceled by inputting the DCSTOPZ or DCRESZ signal.
(a) Cancellation by DCSTOPZ signal input
Hardware STOP mode is canceled when the input to the DCSTOPZ pin goes from low level to high level.
The mode to which the NU85E switches after hardware STOP mode is canceled differs as follows according
to the status in effect before hardware STOP mode was set.
Table 6-4. Status After Cancellation of Hardware STOP Mode
Before Hardware STOP Mode Was Set
Normal operation mode
Software STOP mode
HALT mode
(b) Cancellation by DCRESZ signal input
This is the same as a normal reset operation.
Caution Be sure to input the DCRESZ signal so that the setup and hold times referenced to the
VBCLK signal are satisfied.
CHAPTER 6 STBC
After Hardware STOP Mode Was Canceled
Normal operation mode
Normal operation mode
HALT mode
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