Table 276. Asynchronous Trace Pin Assignment; Figure 521. Tpiu Block Diagram; Tpiu (Trace Port Interface Unit) - ST STM32L4x6 Reference Manual

RM0351
44.17

TPIU (trace port interface unit)

44.17.1 Introduction
The TPIU acts as a bridge between the on-chip trace data from the ITM and the ETM.
The output data stream encapsulates the trace source ID, that is then captured by a trace
port analyzer (TPA).
The core embeds a simple TPIU, especially designed for low-cost debug (consisting of a
special version of the CoreSight TPIU).
44.17.2 TRACE pin assignment
•
Asynchronous mode
The asynchronous mode requires 1 extra pin and is available on all packages. It is only
available if using Serial Wire mode (not in JTAG mode).
TPUI pin name
TRACESWO
•
Synchronous mode
The synchronous mode requires from 2 to 6 extra pins depending on the data trace
size and is only available in the larger packages. In addition it is available in JTAG
mode and in Serial Wire mode and provides better bandwidth output capabilities than
asynchronous trace.

Figure 521. TPIU block diagram

Table 276. Asynchronous TRACE pin assignment

Trace synchronous mode
Type
O TRACE Asynchronous Data Output
DocID024597 Rev 3
Debug support (DBG)
Description
STM32L4x6 pin
assignment
PB3
1671/1693
1678