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Figure 14-51. Input Signal Subjected to Negative Stress
Figure 14-52. Input Signal Subjected to Positive Stress
The current into the signal (I
the following equations:
where:
V
STRESS
V
= Parasitic PNP emitter/base voltage
EB
(refer to V
V
= Parasitic NPN base/emitter voltage
BE
(refer to V
R
STRESS
(10-kΩ resistor in Figure 14-51 and Figure 14-52 on stressed channel)
R
SELECTED
MOTOROLAChapter 14. Queued Analog-to-Digital Converter Enhanced Mode Operation
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
V
STRESS
R
+
R
SELECTED
V
IN
V
STRESS
R
STRESS
+
R
SELECTED
V
IN
or I
) under negative or positive stress is determined by
INJN
INJP
I INJN
I
INJP
= Adjustable voltage source
in Appendix E, "Electrical Characteristics")
NEGCLAMP
in Appendix E, "Electrical Characteristics"))
NEGCLAMP
= Source impedance
= Source impedance on channel selected for conversion
QADC64E Integration Requirements
I
INJN
ANn
Signal Under
STRESS
Stress
10K
PARASITIC
DEVICE
I
IN
Adjacent
ANn+1
Signal
I
AN
Signal Under
INJP
n
Stress
10K
PARASITIC
DEVICE
I
IN
Adjacent
AN
n+1
Signal
(
)
V
V
–
–
STRESS
BE
=
----------------------------------------------------- -
R
STRESS
V
–
V
–
V
STRESS
EB
DDA
=
--------------------------------------------------------------------- -
R STRESS
QADC64E PAR
V
DDA
QADC64E PAR
14-79
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