Motorola MPC533 Reference Manual page 365

CLKOUT
BR (output)
BG
BB
ADDR[8:31]
RD/WR
TSIZ[0:1]
BURST
TS
Data
TA
RETRY (input)
Figure 9-33. Retry Transfer Timing – External Arbiter
When the MPC533 initiates a burst access, the bus interface recognizes the RETRY
assertion as a retry termination only if it detects it before the first data beat was
acknowledged by the slave device. When the RETRY signal is asserted as a termination
signal on any data beat of the access after the first (being the first data beat acknowledged
by a normal TA assertion), the MPC533 recognizes RETRY as a transfer error
acknowledge.
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Allow External
Master to Gain the Bus
ADDR
O
Chapter 9. External Bus Interface
Bus Operations
ADDR
9-49