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Appendix H
Internal Memory Map
The tables in this section use the following notations:
• In the Access column:
— S = Supervisor Access Only
— U = User Access
— T = Test Access
• In the Reset column:
— — (em dash) = Untouched
— S = SRESET
— H = HRESET
— M = Module Reset
— POR = Power-On Reset
— U = Unchanged
— X = Unknown
— R = RSTI,
The codes in the Reset column indicate which reset has an effect on register values.
Table H-2. SPR (Special Purpose Registers)
Table H-3. UC3F Flash Array
Table H-4. DECRAM SRAM Array
Table H-5. BBC (Burst Buffer Controller Module)
Table H-6. USIU (Unified System Interface Unit)
Table H-7. CDR3 Flash Control Registers EEPROM (UC3F)
Table H-8. DLCMD2 (Data Link Controller Module)
Table H-9. QADC64E A Queued Analog-to-Digital Converter)
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Table H-1. Memory Map Quick Reference
Appendix H. Internal Memory Map
Table H-10. QSMCM A and B (Queued Serial
Multi-Channel Module)
Table H-11. MIOS14 (Modular Input/Output
Subsystem)
Table H-12. TouCAN B (CAN 2.0B Controller)
Table H-13. UIMB (U-Bus to IMB Bus Interface)
Table H-14. CALRAM_A and CALRAM_B Control
Registers
Table H-15. CALRAM_B and CALRAM_A Array
Table H-16. READI Module Registers
H-1
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