Motorola MPC533 Reference Manual page 1048

Class-Based Compression Model Main Principles
supplied by the compressor tool and the vocabulary generator. There are two initialization
scenarios:
1. Wake up in decompression off mode — If the chip wakes up with decompression
disabled, the initialization routine can be executed at any time before entering
decompression on mode. After the compression environment is initialized, the
operational mode would be changed to decompression on.
2. Wake up in decompression on mode — If the chip wakes up in decompression on
mode, it has to process compressed instructions without the vocabularies and class
parameters. Thus, all instructions executed until the end of the initialization routine
should be compressed in the global bypass format. DECRAM loading is an
essential part of this intialization routine. After DECRAM loading, efficient
compressed code may be used.
G.2.14 Compression/Non-Compression Mode Switch
The allows the option to switch between compressed and non-compressed code on the fly.
There are two ways to switch between the modes, as shown in Section G.2.14.1,
"Compression Definition for Exception Handlers," and Section G.2.14.2, "Running Mixed
Code."
G.2.14.1 Compression Definition for Exception Handlers
The can wake up upon reset with all the exception handlers defined to be compressed (or
not), so when any exception occurs or completes, the hardware switches to the appropriate
mode without software intervention.
G.2.14.2 Running Mixed Code
If the compression mode is enabled on the , the software can switch between compressed
and non-compressed code by setting (or clearing) the compression mode bit in the RCPU
MSR register. This is done by setting/clearing bit [29] in the RCPU SRR1 register (SRR1
gets loaded into the MSR register when the rfi instruction is executed and bit [29] is the
DCMPEN bit of the MSR). The next step is to load SRR0 with a target address in
compressed/non-compressed format and then executing an rfi instruction. Following is a
suggested routine to execute the switch in both directions (must be run in supervisor mode
when RCPU MSR[PR] bit is cleared):
# R30 contains destination address in appropriate format
.set turn_on_compression_bit_mask, 4
.set turn_off_compression_bit_mask, 0xfffb
mfmsrr31
# to go to compressed code
G-16
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
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