Motorola MPC533 Reference Manual page 858

CALRAM Block Diagram
20.2 CALRAM Block Diagram
JTAG
RPCU
+
FP
20.3 CALRAM Memory Map
The MPC533 chip internal memory map is shown in Figure 20-2.
The CALRAM module is divided into two sections.
• Control section:
— Includes all the registers in the CALRAM module
• Array sub-region:
— Contains memory arrays
TheMPC533 contains CALRAM module — a 32-Kbyte memory at address 0x3F 8000 –
0x3F FFFF as shown in Figure 20-1 and Figure 20-2. In addition, module is assigned 16
32-bit register address spaces: 12 implemented and four unimplemented registers. The 12
implemented registers are: one module configuration register (CRAMMCR), one register
reserved for factory test, eight region base address (CRAM_RBAx) registers, one overlay
configuration register
20-2
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
BBC
L-Bus
32-Kbytes CALRAM
28-Kbyte SRAM
(Non Overlay)
4-Kbyte Overlay
Figure 20-1. System Block Diagram
(CRAMOVLCR),
MPC533 Reference Manual
Flash
U-BUS
READI
L2U
Interface
UIMB
Interface
and one ownership
E-Bus
USIU
trace register
MOTOROLA