Motorola MPC533 Reference Manual page 407

MPC5xx
TS
MTS
Address
CSx
WE/BE
BDIP
Data
BURST
NOTE: The memory controller's BDIP line is used as a burst_in_progress signal.
Configuration For GPCM-Handled Memory Devices
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Synchronous External Master
TA TS BDIP
TA
OE
Figure 10-20. Synchronous External Master
Chapter 10. Memory Controller
Memory Controller External Master Support
BURST
Data ADDR
Memory
TS
Address
CE
OE
W
BDIP
Data
BURST
10-31