Program Exception (0X0700) - Motorola MPC533 Reference Manual

3.15.4.7 Program Exception (0x0700)

A program exception occurs when no higher priority exception exists and one or more of
the following exception conditions, which correspond to bit settings in SRR1, occur during
execution of an instruction:
• System floating-point enabled exception — A system floating-point enabled
exception is generated when the following condition is met as a result of a move to
FPSCR instruction, move to MSR (mtmsr) instruction, or return from interrupt (rfi)
instruction:
• (MSR[FE0] | MSR[FE1]) and- FPSCR[FEX] = 1.
• Notice that in the RCPU implementation of the MPC500 architecture, a program
interrupt is not generated by a floating-point arithmetic instruction that results in the
condition shown above; a floating-point assist exception is generated instead.
• Privileged instruction — A privileged instruction type program exception is
generated by any of the following conditions:
— The execution of a privileged instruction (mfmsr, mtmsr, or rfi) is attempted and
the processor is operating at the user privilege level (MSR[PR] = 1).
— The execution of mtspr or mfspr where SPR0 = 1 in the instruction encoding
(indicating a supervisor-access register) and MSR[PR] = 1 (indicating the
processor is operating at the user privilege level), provided the SPR instruction
field encoding represents either:
— a valid internal-to-the-processor special-purpose register; or
— an external-to-the-processor special-purpose register (either valid or invalid).
• Trap — A trap type program exception is generated when any of the conditions
specified in a trap instruction is met.
Notice that, in contrast to some other MPC500 processors, the RCPU generates a software
emulation exception, rather than a program exception, when an attempt is made to execute
any unimplemented instruction. This includes all illegal instructions and optional
instructions not implemented in the RCPU.
The register settings for program exceptions are shown in Table 3-30.
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Chapter 3. Central Processing Unit
Operating Environment Architecture (OEA)
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