Motorola MPC533 Reference Manual page 450

Programming the QADC64E Registers
Figure 13-3 shows the maximum configuration of four external multiplexer chips
connected to the QADC. The QADC provides three multiplexer address signals – MA[0],
MA[1], MA[2] – to select one of the multiplexer chips. These outputs are the multiplexer
control lines and they are connected to all external multiplexer chips.
AN[0]
AN[2]
AN[4]
AN[6]
MUX
AN[8]
AN[10]
AN[12]
AN[14]
AN[1]
AN[3]
AN[5]
AN[7]
MUX
AN[9]
AN[11]
AN[13]
AN[15]
AN[16]
AN[18]
AN[20]
AN[22]
MUX
AN[24]
AN[26]
AN[28]
AN[30]
AN[17]
AN[19]
AN[21]
AN[23]
MUX
AN[25]
AN[27]
AN[29]
AN[31]
Table 13-5 shows the total number of analog input channels supported with zero to four
external multiplexer chips using one QADC module.
If QADC64E A is in external multiplexing (EMUX) mode then
the multiplexer address signal channels, AN[52:54] should not
be programmed into queues.
13.3 Programming the QADC64E Registers
The QADC64E has three global registers for configuring module operation:
• Module configuration register (Section 13.3.1, "QADC64E Module Configuration
Register (QADMCR)"),
13-6
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
V SSA
V DDA
V
RH
V RL
AN[52]/MA[0]/PQA[0]
AN[53]/MA[1]/PQA[1]
AN[54]/MA[2]/PQA[2]
AN[55]/PQA[3]
AN[56]/PQA[4]
AN[57]PQA[5]
AN[58]/PQA[6]
AN[59]/PQA[7]
External Triggers:
ETRIG1
ETRIG2
Figure 13-3. Example of External Multiplexing
NOTE: QADC64E External MUX Users
MPC533 Reference Manual
ANALOG POWER
ANALOG REFERENCES
ANALOG
MULTIPLEXER
CONVERTER
AND
PORT LOGIC
QADC
ANALOG
DIGITAL
CONTROL
MOTOROLA