Motorola MPC533 Reference Manual page 791

Bits Name
0:4 EN15:11 Enable Bits — MDASM enable bits [15:11]
5:6 — Reserved
7:9 EN8:6 Enable Bits — MMCSM enable bits [8:6]
10:15 EN5:0 Enable Bits — PWMSM enable bits [5:0]
17.12.3.3 Interrupt Request Pending Register (MIOS14RPR0)
This register is a read only register that contains the interrupt pending bits for the
submodules. Each bit corresponds to a given submodule. When one of these bits is set, it
means that a submodule raised its flag and the corresponding enable was set.
As this register is read only, a write to this register has no other effect than generating a bus
error if the bus error option is selected.
MSB 1
0
Field IRP15 IRP14 IRP13 IRP12 IRP11
SRESET
Addr
Figure 17-36. Interrupt Request Pending Register (MIOS14RPR0)
Bits Name
0:4 IRP15:11 Pending Bits — MDASM pending bits [15:11]
5:6 — Reserved
7:9 IRP8:6 Pending Bits — MMCSM pending bits [8:6]
10:15 IRP5:0 Pending Bits — PWMSM pending bits [5:0]
17.12.4 MIRSM1 Interrupt Registers
17.12.4.1 Interrupt Status Register (MIOS14SR1)
This register contains the flag bits that are raised when the submodules generate an
interrupt. Each bit corresponds to a given submodule.
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Table 17-37. MIOS14ER0 Bit Descriptions
2 3 4 5
—
Table 17-38. MIOS14PR0 Bit Descriptions
Chapter 17. Modular Input/Output Subsystem (MIOS14)
Description
6 7 8 9
IRP8 IRP7 IRP6 IRP5 IRP4 IRP3 IRP2 IRP1 IRP0
0000_0000_0000_0000
0x30 6C06
Description
MIOS14 Interrupts
10 11 12 13 14 LSB
15
17-67