Motorola MPC533 Reference Manual page 296

Low-Power Modes
Table 8-5. Power Mode Descriptions (continued)
Operation Mode
Doze-high
Doze-low
Sleep
Deep-sleep
Power-down
SRAM Standby
8.7.3 Exiting from Low-Power Modes
Exiting from low-power modes occurs through an asynchronous interrupt or a synchronous
interrupt generated by the interrupt controller. Any enabled asynchronous interrupt clears
the LPM bits but does not change the PLPRCR[CSRC] bit.
The return to normal-high mode from normal-low, doze-high, low, and sleep mode is
accomplished with the asynchronous interrupt. The sources of the asynchronous interrupt
are:
• Asynchronous wake-up interrupt from the interrupt controller
• RTC, PIT, or time base interrupts (if enabled)
• Decrementer exception
The system responds quickly to asynchronous interrupts. The wake-up time from
normal-low, doze-high, doze-low, and sleep mode caused by an asynchronous interrupt or
a decrementer exception is only three to four clock cycles of maximum system frequency.
In 40-MHz systems, this wake-up requires 75 to 100 ns. The asynchronous wake-up
interrupt from the interrupt controller is level sensitive one. It will therefore be negated only
after the reset of interrupt cause in the interrupt controller.
The timers' (RTC, PIT, time base, or decrementer) interrupts indications set status bits in
the PLPRCR (TMIST). The clock module considers this interrupt to be pending
asynchronous interrupt as long as the TMIST is set. The TMIST status bit should be cleared
before entering any low-power mode.
Table 8-7 summarizes wake-up operation for each of the low-power modes.
8-18
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
SPLL Clocks
Active Full frequency ÷
DFNH
2
Active Full frequency ÷
DFNL+1
2
Active Not active
Not active Not active
Not active Not active
Not active Not active
MPC533 Reference Manual
Power Pins that Need
Functionality
Enabled: RTC, PIT,
TB and DEC, VDD, QVDDL, NVDDL,
controller
Disabled: extended core
VDD, QVDDL, NVDDL,
(RCPU, BBC, FPU)
Enabled: RTC, PIT, TB
and DEC
SRAM data
retention
to be Powered-Up
KAPWR, VDDSYN,
KAPWR, VDDSYN,
KAPWR, VDDSYN,
KAPWR,
KAPWR,
MOTOROLA