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4.2.2
Burst Operation and Access Violation Detection
Refer to Appendix G, "MPC534 Compression Features" for an explanation of access
violation detection and the burst feature of the BBC.
4.2.3
Slave Operation
The BBC is operating as a U-bus slave when the IMPU registers, decompressor RAM
(DECRAM) or ICDU registers are accessed from the U-bus. The IMPU register
programming is done using MPC500 mtspr/mfspr instructions. The ICDU configuration
registers (DCCRs) (see Table 4-10) and DECRAM are mapped into the chip memory space
and accessed by MPC500 load/store instructions. DCCR and DECRAM accesses may be
disabled by BBCMCR[DCAE] bit. Refer to Section 4.6.2.1, "BBC Module Configuration
Register (BBCMCR)."
4.2.4
Reset Behavior
Upon soft reset, the BBC switches to an idle state and all pending U-bus accesses are
ignored, the ICDU internal queue is flushed and the IMPU switches to a disabled state
where all memory space is accessible for both user and supervisor.
Hard reset sets some of the fields and bits in the BBC configuration registers to their default
reset state. Some bits in BBCMCR register get their values from the reset configuration
word.
All the registers are reset using HRESET; SRESET alone has no effect on them.
Because HRESET resets the EN_COMP bit and the
EXC_COMP bit but SRESET does not, there may be different
behavior between HRESET and SRESET when both
EN_COMP and EXC_COMP are set. Special care must be
taken to ensure operation in a known mode whenever reset
occurs. The reset states of these bits are determined by reset
configuration words. The location of the reset vector is
dependent on the value of the MSR[IP] bit in the RCPU. If
MSR[IP] is set, the exception table relocation feature can be
used. See Section 4.3.2, "ETR Operation."
4.2.5
Debug Operation Mode
When the MPC533 RCPU core is in debug mode, the BBC initiates non-burstable access
to the debug port and ICDU is bypassed (i.e., instructions transmitted to the debug port
must be non-compressed regardless of operational mode).
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
NOTE
Chapter 4. Burst Buffer Controller 2 Module
Operation Modes
4-5
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