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QADC64E Integration Requirements
Figure 13-52 shows an active parasitic bipolar NPN transistor when an input signal is
subjected to negative stress conditions. Figure 13-53 shows positive stress conditions can
activate a similar PNP transistor.
Figure 13-52. Input Signal Subjected to Negative Stress
Figure 13-53. Input Signal Subjected to Positive Stress
The current into the signal (I
the following equations:
where:
V
STRESS
V
= Parasitic PNP emitter/base voltage
EB
(refer to V
V
= Parasitic NPN base/emitter voltage
BE
(refer to V
13-78
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
V
STRESS
R
STRESS
+
R
SELECTED
V
IN
V
STRESS
R
STRESS
+
10K
R
SELECTED
V
IN
or I
) under negative or positive stress is determined by
INJN
INJP
I
INJN
I INJP
= Adjustable voltage source
in Appendix E, "Electrical Characteristics")
NEGCLAMP
in Appendix E, "Electrical Characteristics")
NEGCLAMP
MPC533 Reference Manual
I
INJN
AN
Signal Under
n
Stress
10K
Parasitic
Device
I
IN
Adjacent
AN
signal
n+1
I
INJP
AN
Signal Under
n
Stress
PARASITIC
DEVICE
I
IN
Adjacent
AN
signal
n+1
(
)
V STRESS V BE
–
–
=
----------------------------------------------------- -
R
STRESS
V
–
V
–
V
STRESS
EB
DDA
=
--------------------------------------------------------------------- -
R
STRESS
QADC64E PAR
V
DDA
QADC64E PAR
MOTOROLA
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