Motorola MPC533 Reference Manual page 214

Memory Map and Registers
Table 5-2. USIU Special-Purpose Registers (continued)
Internal
Address[0:31]
0x3A80
0x3D30
1
Bits [0:17] and [28:31] are all 0.
Table 5-3 shows the MPC533 address format for special purpose register access. For an
external master, accessing an MPC500 SPR, address bits [0:17] and [28:31] are compared
to zeros to confirm that an SPR access is valid. See Section 6.1.2.1, "Operation in External
Master Modes," for more details.
.
Table 5-3. Hex Address Format for SPR Cycles
5-8
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Register
Time Base Upper — Write (TBU).
See Section 6.2.2.4.2, "Time Base SPRs (TB),"
and Table 3-14 for bit descriptions.
Internal Memory Mapping Register (IMMR).
See Table 6-12 for bit descriptions.
A[0:17] A[18:22]
0 spr5:9
MPC533 Reference Manual
Decimal Address
spr[5:9]:spr[0:4]
A[23:27] A[28:31]
spr0:4 0
1
285
638
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