Motorola MPC533 Reference Manual page 339

CLKOUT
BR
BG
BB
ADDR[8:31]
RD/WR
TSIZ[0:1]
BURST
TS
BDIP
Data
TA
Figure 9-15. Burst-Read Cycle – 32-Bit Port Size – Wait States Between Beats
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
ADDR[28:31] = 0000
00
Expects Another Data
Normal or Late
O
O
O
O
Data
is Valid
Wait State
Chapter 9. External Bus Interface
O
O
Data
is Valid
Bus Operations
Last Beat
O
No Data
Expected
O
Data
Data
is Valid
is Valid
9-23