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TX_CONFIG_1 and TX_CONFIG_2 can only be written to while PPM transmit mode is
disabled (PPMPCR[ENTX] = 0). While transmit is enabled these registers read as 0x00 and
writing them will return TEA (bus error access).
MSB
1
2
0
Field
CH7
Reset
Addr
Figure 18-14. Transmit Configuration Register 1 (TX_CONFIG_1)
MSB
1
2
0
Field
CH15
Reset
Addr
Figure 18-15. Transmit Configuration Register 2 (TX_CONFIG_2)
18.4.4
Receive Configuration Registers (RX_CONFIG_1 and
RX_CONFIG_2)
The two receive configuration registers control which internal modules will receive data
from the PPM. Each of the configuration registers contains eight separate 2-bit wide bit
fields. Each of the 16 fields controls a multiplexer that selects a 1-bit channel from the PPM
data receive register to an internal module. See Table 18-6 for more information on channel
control and setting the channel values.
RX_CONFIG_1 and RX_CONFIG_2 can only be written to while PPM receive mode is
disabled (PPMPCR[ENRX] = 0). While receive mode is enabled these registers read as
0x00 and writing them will return TEA (bus error access).
MSB
1
2
0
Field
CH7
Reset
Addr
Figure 18-16. Receive Configuration Register 1 (RX_CONFIG_1)
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
3
4
5
6
CH6
CH5
0000_0000_0000_0000
3
4
5
6
CH14
CH13
0000_0000_0000_0000
3
4
5
6
CH6
CH5
0000_0000_0000_0000
Chapter 18. Peripheral Pin Multiplexing (PPM) Module
7
8
9
CH4
CH3
0x30 5C06
7
8
9
CH12
CH11
0x30 5C08
7
8
9
CH4
CH3
0x30 5C0E
PPM Registers
10
11
12
13
CH2
CH1
10
11
12
13
CH10
CH9
10
11
12
13
CH2
CH1
14
LSB
15
CH0
14
LSB
15
CH8
14
LSB
15
CH0
18-15
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