Motorola MPC533 Reference Manual page 1054

Operation Modes
Bits Mnemonic
20 SIWP0EN Software trap enable selection of
the 1st I-bus watchpoint
21 SIWP1EN Software trap enable selection of
the 2nd I-bus watchpoint
22 SIWP2EN Software trap enable selection of
the 3rd I-bus watchpoint
23 SIWP3EN Software trap enable selection of
the 4th I-bus watchpoint
24 DIWP0EN Development port trap enable
selection of the 1st I-bus
watchpoint (read only bit)
25 DIWP1EN Development port trap enable
selection of the 2nd I-bus
watchpoint (read only bit)
26 DIWP2EN Development port trap enable
selection of the 3rd I-bus
watchpoint (read only bit)
27 DIWP3EN Development port trap enable
selection of the 4th I-bus
watchpoint (read only bit)
28 IFM Ignore first match, only for I-bus
breakpoints
29:31 ISCT_SER RCPU serialize control and
Instruction fetch show cycle
1
G-22
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Table 0-1. ICTRL Bit Descriptions (continued)
Description
MPC533 Reference Manual
Function
Non-compressed mode
0 = trap disabled (reset
value)
1 = trap enabled
0 = trap disabled (reset
value)
1 = trap enabled
0 = Do not ignore first match,
used for "go to x" (reset
value)
1 = Ignore first match (used
for "continue")
These bits control
serialization and instruction
fetch show cycles. See
Table G-13 for the bit
definitions.
NOTE: Changing the
instruction show cycle
programming starts to take
effect only from the second
instruction after the actual
mtspr to ICTRL.
1
Compressed Mode
0 = trap disabled (reset
value)
1 = trap enabled
0 = trap disabled (reset
value)
1 = trap enabled
0 = Do not ignore first match,
used for "go to x" (reset
value)
1 = Ignore first match (used
for "continue")
These bits control
serialization and instruction
fetch show cycles. See
Table G-13 for the bit
definitions.
NOTE: Changing the
instruction show cycle
programming starts to take
effect only from the second
instruction after the actual
mtspr to ICTRL.
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