Motorola MPC533 Reference Manual page 207

Chapter 5
Unified System Interface Unit (USIU)
Overview
The unified system interface unit (USIU) of the MPC533 consists of several functional
modules that control system start-up, system initialization and operation, system
protection, and the external system bus. The MPC533 USIU functions include the
following and are discussed in the designated chapters.
• System configuration and protection with GPIO capability and an enhanced
interrupt controller. Refer to Chapter 6, "System Configuration and Protection."
• System reset monitoring and generation, refer to Chapter 7, "Reset."
• Clock synthesis, power management, and debug support. Refer to Chapter 8,
"Clocks and Power Control."
• External bus interface (EBI), refer to Chapter 9, "External Bus Interface."
• Memory controller that supports four memory banks. Refer to Chapter 10, "Memory
Controller."
The USIU provides system configuration and protection features that control the overall
system configuration and supply various monitors and timers including the bus monitor,
software watchdog timer, periodic interrupt timer, PPC decrementer, time base, and
real-time clock. Freeze support and low power stop is provided. The interrupt controller
supports up to eight external interrupts, eight levels for all internal USIU interrupt sources
and 32 levels for internal peripheral modules on the IMB bus. It has an enhanced mode of
operation, which simplifies the MPC533 interrupt structure and speeds up interrupt
processing.
Additionally, the USIU provides several pinout configurations that allow up to 64
general-purpose I/O, external 32-bit port that supports internal and external masters, and
various debug functions.
Reset logic for the MPC533 provides soft and hard resets, checkstop and watchdog resets,
and other types of reset. The reset status register (RSR) reflects the most recent source to
cause a reset.
MOTOROLA Chapter 5. Unified System Interface Unit (USIU) Overview
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
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