Motorola MPC533 Reference Manual page 422

Data Memory Protection
matches the specific region within its appropriate size, as defined by the region attribute
register's region size field (L2U_RAx[RS]), sets a match indication.
When more than one match indication occurs, the effective region is the region with the
highest priority. Priority is determined by region number; highest priority corresponds to
the lowest region number, e.g. region 0 is highest priority, while region 3 is lowest.
When no match occurs, the effective region is the global region, which has the lowest
priority.
The region attribute register also contains the region's protection fields. The protection
field (PP) of the effective region is compared to the access attributes. If the attributes match,
the access is permitted. When the access is permitted, a U-bus access may be generated
according to the specific attribute of the effective region.
When the access by the RCPU is not permitted, the L2U module asserts a data memory
storage exception to the RCPU.
For speculative load/store accesses from the RCPU to a region marked as guarded (G bit of
region attribute register is set), the L2U asks the RCPU to retry the L-bus cycle until either
the access is not speculative, or is canceled by the RCPU.
In the case of attempted accesses to a guarded region together with any other protection
violation (no access), the L2U retries the access. The L2U handles this event as a data
storage violation only when the access becomes non-speculative.
Note that access protection is active only when the MPC500's MSR[DR] = 1. When
MSR[DR] = 0, DMPU exceptions are disabled, all accesses are considered to be to a
guarded memory area, and no speculative accesses are allowed. In this case, if the L-bus
master [RCPU] initiates a non-CALRAM cycle (access through the L2U) that is marked
speculative, the L2U asks the RCPU to retry the L-bus cycle until either the access is not
speculative, or it is canceled by the RCPU Core.
The programmer must not overlap the CALRAM memory
space with any enabled region. Overlapping an enabled region
with CALRAM memory space disables the L2U data memory
protection for that region.
If an enabled region overlaps with the L-bus space, the DMPU
ignores all accesses to addresses within the L-bus space. If an
enabled region overlaps with MPC500 register addresses, the
DMPU ignores any access marked as an MPC500 access.
11-6
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
NOTE
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