Table of Contents
Advertisement
17.11.1
MPIOSM Features
• A submodule of the MIOS14 library
• Uses two 16-bit registers in the address space
• Up to 16 bidirectional parallel input/output signals
• Simple DDR (data direction register) concept for signal direction selection
17.11.2 MPIOSM Signal Functions
Table 17-33 shows the MPIOSM I/O signal functions according to the setting of the DDR
when writing to or reading from the DR.
Operation
DDR
Performed
Write
0
Write
1
Read
0
Read
1
17.11.3
MPIOSM Description
17.11.3.1 MPIOSM Port Function
A MIOS14 parallel port I/O submodule can handle up to 16 input/output signals. The
number of I/O signals is determined at the time of silicon implementation.
The MPIOSM has two 16-bit registers: the data register (DR) and the data direction register
(DDR). Each signal of the MPIOSM may be programmed as an input or an output,
determined by the state of the corresponding bit in the DDR.
The data direction register can be written to or read by the processor. During the
programmed output state, a read of the data register reads the value of the output data latch
and not the I/O signal. See Figure 17-29 and Table 17-33.
During reset, all MPIOSM signals are configured as inputs. The contents of the data register
are undefined after reset.
As a general practice, it is recommended to write a value in the data register before
configuring its corresponding I/O signal as an output.
MOTOROLA
Chapter 17. Modular Input/Output Subsystem (MIOS14)
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
MIOS14 16-bit Parallel Port I/O Submodule (MPIOSM)
Table 17-33. MPIOSM I/O Signal Function
The I/O signal is in input mode. Data is written into the DR.
Data is written into the DR and output to the I/O signal.
The I/O signal is in input mode. The state of the I/O signal is read.
The I/O signal is in an output mode. The DR is read.
I/O Signal Function
17-61
Advertisement
Table of Contents
