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When any of the end-of-queue conditions is recognized, a queue completion flag is set, and
if enabled, an interrupt is issued to the software. The following situations prematurely
terminate queue execution:
• Because queue 1 is higher in priority than queue 2, when a trigger event occurs on
queue 1 during queue 2 execution, the execution of queue 2 is suspended by aborting
the execution of the CCW in progress, and the queue 1 execution begins. When
queue 1 execution is completed, queue 2 conversions restart with the first CCW
entry in queue 2 or the first CCW of the queue 2 sub-queue being executed when
queue 2 was suspended. Alternately, conversions can restart with the aborted queue
2 CCW entry. The RESUME bit in QACR2 allows the software to select where
queue 2 begins after suspension. By choosing to re-execute all of the suspended
queue 2 queue and sub-queue CCWs, all of the samples are guaranteed to have been
taken during the same scan pass. However, a high trigger event rate for queue 1 can
prohibit the completion of queue 2. If this occurs, the software may choose to begin
execution of queue 2 with the aborted CCW entry.
• Software can change the queue operating mode to disabled mode. Any conversion
in progress for that queue is aborted. Putting a queue into the disabled mode does
not power down the converter.
• Software can change the queue operating mode to another valid mode. Any
conversion in progress for that queue is aborted. The queue restarts at the beginning
of the queue, once an appropriate trigger event occurs.
• For low power operation, software can set the stop mode bit to prepare the module
for a loss of clocks. The QADC64E aborts any conversion in progress when the stop
mode is entered.
• When the freeze enable bit is set by software and the IMB3 internal FREEZE line is
asserted, the QADC64E freezes at the end of the conversion in progress. When
internal FREEZE is negated, the QADC64E resumes queue execution beginning
with the next CCW entry. Refer to Section 13.5.7, "Configuration and Control Using
the IMB3 Interface" for more information.
MSB
1
0
Field
SRESET
Addr
Figure 13-14. Conversion Command Word Table (CCW)
MOTOROLA Chapter 13. Queued Analog-to-Digital Converter Legacy Mode Operation
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
2
3
4
5
—
0x30 4A00 – 0x30 4A7F, 0x30 4E00 – 0x30 4E7F
Programming the QADC64E Registers
6
7
8
9
P
BYP
IST
Unaffected
10
11
12
13
CHAN[5:0]
14
LSB
15
13-29
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