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When a change of flow occurs, the RCPU issues the new address in compression format.
The address extractor unit of the BBC extracts the base address to instruction memory.
When the compressed memory word is brought to the BBC from the memory, the ICDU
uses the IP field of the RCPU-issued address to start the decompression process. The BBC
provides compressed addresses of the decompressed and next instructions to the RCPU
together with the decompressed instruction.
Shortened word pointer fields of direct branches in compressed mode imply some
limitations on compilers that implement the PowerPC architecture. They should generate
binaries, with limited direct branch displacements to make the compression.possible.
If a conditional branch target, generated by a compiler, must be farther than the
compression mode limitation, the compiler may generate a sequence of a conditional
branch with opposite condition to skip the following unconditional branch to the original
target.
If the unconditional branch range is still not big enough, the compiler can use branch chains
or indirect branches.
G.2.5
Compressed Address Generation– Indirect
Branches
The indirect branch destination address is copied without any change from one of the
following RCPU registers:
• LR
• CTR
• SRR0
See the RCPU User's Manual, RCPURM/AD, for more details.
These registers should contain (or be loaded by) the 32-bit compressed address of existing
compressed instructions to be used for correct branching.
The LR register is automatically updated by the correct value of the "next" instruction
compressed address during subroutine calls by using the 'L' - form of branch instructions
(like bl or bcl).
The SRR0 register is updated by the correct return compressed address when exceptions
are taken by the RCPU, thus the rfi instruction obtains the correct return address from an
exception handler.
G.2.6
Compressed Address Generation– Exceptions
Upon an exception, the RCPU core issues a regular 0xFFF00X00 or 0x00000X00
exception vector as specified in the PowerPC architecture. The compressed exception
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Appendix G. MPC534 Compression Features
Class-Based Compression Model Main Principles
G-7
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