Motorola MPC533 Reference Manual page 1062

Table H-2. SPR (Special Purpose Registers) (continued)
Address Access
SPR 560 S
SPR 568 S
SPR 630 S
SPR 638 S
SPR 784 – 787 S
SPR 792 – 795 S
SPR 816 – 819 S
SPR 824 – 827 S
SPR 1022 S
Address Access
0x00 0000 — U,S
0x07 FFFF
0x08 0000 — U,S
0x0F FFFF
Address Access
0x2F 8000 — U,S
0x2F 8FFF
H-4
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Symbol
BBCMCR BBC Module Configuration Register.
See Table 4-4 for bit descriptions.
L2U_MCR L2U Module Configuration Register.
See Table 11-7 for bit descriptions.
DPDR Development Port Data Register
See Section 21.4.6, "Development Port
Registers" for bit descriptions.
IMMR Internal Memory Mapping Register.
See Table 6-12 for bit descriptions.
MI_RBAx MI Region x Base Address Register.
See Table 4-5 for bit descriptions.
L2U_RBAx L2U Region x Base Address Register.
See Table 11-8 for bit descriptions.
MI_RAx MI Region x Attribute Register.
See Table 4-6 for bit descriptions.
L2U_RAx L2U Region x Attribute Register.
See Table 11-9 for bit descriptions.
FPECR Floating-Point Exception Cause Register
See Section 3.9.10.2, "Floating-Point
Exception Cause Register (FPECR)" for bit
descriptions.
Table H-3. UC3F Flash Array
Symbol
UC3F_A
UC3F_A UC3F Flash Array A.
UC3F_B
UC3F_B UC3F Flash Array B.
Table H-4. DECRAM SRAM Array
Symbol
DECRAM DECRAM SRAM
MPC533 Reference Manual
Register
Register
Register
Size Reset
32 —
32 —
32 —
32 POR, H
32 —
32 —
32 —
32 —
32 —
Size Reset
32 —
32 —
Size Reset
32 —
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