Motorola MPC533 Reference Manual page 627

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MSB
1
0
Field SPIFIE WREN WRTO
SRESET
Addr
Figure 15-13. SPCR2 — QSPI Control Register 2
Bits
Name
0
SPIFIE
SPI finished interrupt enable. Refer to Section 15.6.4.2, "QSPI Interrupts."
0 QSPI interrupts disabled
1 QSPI interrupts enabled
1
WREN
Wrap enable. Refer to Section 15.6.5.8, "Master Wraparound Mode."
0 Wraparound mode disabled.
1 Wraparound mode enabled.
2
WRTO
Wrap to. When wraparound mode is enabled and after the end of queue has been reached,
WRTO determines which address the QSPI executes next. The end of queue is determined by
an address match with ENDQP.
0 Wrap to pointer address 0x0
1 Wrap to address in NEWQP
3:7
ENDQP
Ending queue pointer. This field determines the last absolute address in the queue to be
completed by the QSPI. After completing each command, the QSPI compares the queue pointer
value of the just-completed command with the value of ENDQP. If the two values match, the QSPI
sets SPIF to indicate it has reached the end of the programmed queue. Refer to Section 15.6.4,
"QSPI Operation" for more information.
8:10
Reserved
11:15
NEWQP
New queue pointer value. This field contains the first QSPI queue address. Refer to
Section 15.6.4, "QSPI Operation" for more information.
15.6.1.4 QSPI Control Register 3 (SPCR3)
SPCR3 contains the loop mode enable bit, halt and mode fault interrupt enable, and the halt
control bit. The CPU has read/write access to SPCR3, but the QSPI has read access only.
SPCR3 must be initialized before QSPI operation begins. Writing a new value to SPCR3
while the QSPI is enabled disrupts operation.
MSB
1
2
0
Field
SRESET
Addr
Note: See bit descriptions in Table 15-18
Figure 15-14. SPCR3 — QSPI Control Register 3
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
2
3
4
5
ENDQP
0000_0000_0000_0000
Table 15-16. SPCR2 Bit Descriptions
3
4
5
6
LOOPQ HMIE HALT
0000_0000_0000_0000
Chapter 15. Queued Serial Multi-Channel Module
Queued Serial Peripheral Interface
6
7
8
9
0x30 501C
Description
7
8
9
10
0x30 501E
10
11
12
13
14
NEWQP
11
12
13
14
SPSR*
LSB
15
LSB
15
15-21

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