Renesas H8S/2633 Series Hardware Manual page 365

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Figure 8-28 shows a transfer example in which TEND output is enabled and word-size single
address mode transfer (read) is performed from external 8-bit, 2-state access space to an external
device.
ø
Address bus
RD
DACK
TEND
Bus
release
Figure 8-28 Example of Single Address Mode (Word Read) Transfer
A one-byte or one-word transfer is performed for one transfer request, and after the transfer the
bus is released. While the bus is released, one or more bus cycles are inserted by the CPU or
DTC.
In the transfer end cycle (the cycle in which the transfer counter reaches 0), a one-state DMA dead
cycle is inserted after the DMA write cycle.
DMA read
Bus
release
DMA read
Bus
release
DMA
DMA read
dead
Last transfer
Bus
cycle
release
311

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