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10B.9.2 Register Configuration
Table 10B-14 shows the port C register configuration.
Table 10B-14 Port C Registers
Name
Port C data direction register
Port C data register
Port C register
Port C MOS pull-up control register
Port C open-drain control register
Note: * Lower 16 bits of the address.
Port C Data Direction Register (PCDDR)
Bit
:
7
PC7DDR PC6DDR PC5DDR PC4DDR PC3DDR PC2DDR PC1DDR PC0DDR
Initial value :
0
R/W
:
W
PCDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port C. PCDDR cannot be read; if it is, an undefined value will be read.
PCDDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its
prior state by a manual reset or in software standby mode. The OPE bit in SBYCR is used to select
whether the address output pins retain their output state or become high-impedance when the
mode is changed to software standby mode.
• Modes 4 and 5
The corresponding port C pins are address outputs irrespective of the value of the PCDDR bits.
• Mode 6
Setting a PCDDR bit to 1 makes the corresponding port C pin an address output, while
clearing the bit to 0 makes the pin an input port.
• Mode 7
Setting a PCDDR bit to 1 makes the corresponding port C pin an output port, while clearing
the bit to 0 makes the pin an input port.
Abbreviation
PCDDR
PCDR
PORTC
PCPCR
PCODR
6
5
4
0
0
0
W
W
W
R/W
Initial Value
W
H'00
R/W
H'00
R
Undefined
R/W
H'00
R/W
H'00
3
2
0
0
W
W
Address*
H'FE3B
H'FF0B
H'FFBB
H'FE42
H'FE49
1
0
0
0
W
W
485
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