Renesas H8S/2633 Series Hardware Manual page 21

Section
24.2.1 Standby
Control Register
(SBYCR)
24.2.2 System Clock
Control Register
(SCKCR)
24.2.3 Low-Power
Control Register
(LPWRCR)
24.2.4 Timer
Control/Status Register
(TCSR)
24.5.1 Module Stop
Mode
24.5.2 Usage Notes
24.6.3 Setting
Oscillation Stabilization
Time after Clearing
Software Standby
Mode
Page Item
989 Bit 7—Software Standby
(SSBY)
990 Bits 6 to 4—Standby Timer
Select 2 to 0 (STS2 to STS0)
Bit 3—Output Port Enable
(OPE)
991, 992 Bit 7—ø Clock Output Disable
(PSTOP), Bit 3—Frequency
Multiplication Factor Switch
Mode Select (STCS), Bits 2 to
0—System Clock Select (SCK2
to SCK0)
992
993, 994 Bit 7—Direct Transfer On Flag
(DTON) and Bit 6—Low Speed
ON Flag (LSON)
995, 996
999
1000 Table 24-4 MSTP Bits and
Corresponding On-Chip
Supporting Modules
1001
1003 Table 24-5 Oscillation
Stabilization Time Settings
Description
Note * added
Note * added and
Description amended
(Setting Prohibited) added to
Bits 6 to 4 table
Note * added
Note * added
H8S/2633R added to bit
table for H8S/2633 Series
H8S/2695 bit table and Note
* added
Note *, *2 added
Note *1 added
Note * added
Note *2 added
Description of Reading I/O
Ports in Subactive Mode
added
Under Standby Time, 16
states changed to 16 states
(setting prohibited)
Note * deleted.
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