Renesas H8S/2633 Series Hardware Manual page 484

Pin Selection Method and Pin Functions
PF3/LWR/ADTRG/ The pin function is switched as shown below according to the operating mode,
IRQ3
the bus mode, A/D converter bits TRGS1 and TRGS0, and bit PF3DDR.
Operating
mode
Bus mode
PF3DDR
Pin function
Notes: *1 ADTRG input when TRGS0 = TRGS1 = 1.
PF2/LCAS/WAIT/ The pin function is switched as shown below according to the combination of
BREQO
the operating mode and bits RMTS2 to RMTS0, LCASS, BREQOE, WAITE,
ABW5 to ABW2, and PF2DDR.
Operating
Mode
LCASS
BREQOE
WAITE
PF2DDR
Pin function
Note: * Restricted to RMTS2 to RMTS0=B'001 to B'011, DRAM space 16-bit
PF1/BACK/ The pin function is switched as shown below according to the combination of
BUZZ the operating mode and bits BRLE, BUZZE, and PF1DDR.
Operating
Mode
BRLE
BUZZE
PF1DDR
Pin function
430
Modes 4 to 6
16-bit bus
mode
—
LWR output
pin
*2 When used as an external interrupt input pin, do not use as an I/O
pin for another function.
0*
—
—
—
LCAS
PF2
output input
pin pin
access in modes 4 to 6 only.
Modes 4 to 6
0
0
PF1 PF1
input output
pin pin
8-bit bus mode
0 1
PF3 input PF3 output
pin pin
ADTRG input pin*
IRQ3 input pin*
Modes 4 to 6
1
0
0 1
0 1 —
WAIT
PF2
output input
pin pin
0 1
1 —
1 — —
BACK
BUZZ
output output
pin pin
Mode 7
—
0 1
PF3 input PF3 output
pin pin
1
2
Mode 7
—
1 —
— —
— 0 1
BREQO
PF2 PF2
output input output
pin pin pin
Mode 7
—
0 1
0 1 —
PF1 PF1 BUZZ
input output output
pin pin pin