Renesas H8S/2633 Series Hardware Manual page 129

Type Instruction
System control LDC
instructions
STC
ANDC
ORC
XORC
NOP
Block data EEPMOV.B
transfer
instruction
EEPMOV.W
Notes: *1 Size refers to the operand size.
B: Byte
W: Word
L: Longword
*2 When using the TAS instruction, use register ER0, ER1, ER4, or ER5.
1
Size* Function
(EAs) → CCR, (EAs) → EXR
B/W
Moves the source operand contents or immediate data
to CCR or EXR. Although CCR and EXR are 8-bit
registers, word-size transfers are performed between
them and memory. The upper 8 bits are valid.
CCR → (EAd), EXR → (EAd)
B/W
Transfers CCR or EXR contents to a general register or
memory. Although CCR and EXR are 8-bit registers,
word-size transfers are performed between them and
memory. The upper 8 bits are valid.
CCR ∧ #IMM → CCR, EXR ∧ #IMM → EXR
B
Logically ANDs the CCR or EXR contents with
immediate data.
CCR ∨ #IMM → CCR, EXR ∨ #IMM → EXR
B
Logically ORs the CCR or EXR contents with immediate
data.
CCR ⊕ #IMM → CCR, EXR ⊕ #IMM → EXR
B
Logically exclusive-ORs the CCR or EXR contents with
immediate data.
PC + 2 → PC
—
Only increments the program counter.
if R4L ≠ 0 then
—
Repeat @ER5+ → @ER6+
R4L–1 → R4L
Until R4L = 0
else next;
if R4 ≠ 0 then
—
Repeat @ER5+ → @ER6+
R4–1 → R4
Until R4 = 0
else next;
Transfers a data block according to parameters set in
general registers R4L or R4, ER5, and ER6.
R4L or R4: size of block (bytes)
ER5: starting source address
ER6: starting destination address
Execution of the next instruction begins as soon as the
transfer is completed.
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