Operation; Tcnt Incrementation Timing - Renesas H8S/2633 Series Hardware Manual

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13.3

Operation

13.3.1

TCNT Incrementation Timing

TCNT is incremented by input clock pulses (either internal or external).
Internal Clock: Three different internal clock signals (ø/8, ø/64, or ø/8192) divided from the
system clock (ø) can be selected, by setting bits CKS2 to CKS0 in TCR. Figure 13-2 shows the
count timing.
ø
Internal clock
Clock input
to TCNT
TCNT
External Clock: Three incrementation methods can be selected by setting bits CKS2 to CKS0 in
TCR: at the rising edge, the falling edge, and both rising and falling edges.
Note that the external clock pulse width must be at least 1.5 states for incrementation at a single
edge, and at least 2.5 states for incrementation at both edges. The counter will not increment
correctly if the pulse width is less than these values.
Figure 13-3 shows the timing of incrementation at both edges of an external clock signal.
N–1
Figure 13-2 Count Timing for Internal Clock Input
N
N+1
641

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