Renesas H8S/2633 Series Hardware Manual page 231

Bit 3—Burst Cycle Select 0 (BRSTS0): Selects the number of words that can be accessed in a
burst ROM interface burst access.
Bit 3
BRSTS0 Description
0 Max. 4 words in burst access
1 Max. 8 words in burst access
Bits 2 to 0—RAM Type Select (RMTS2 to RMTS0): In advanced mode, these bits select the
memory interface for areas 2 to 5.
When DRAM space* is selected, the appropriate area becomes the DRAM interface*.
Note: * This function is not available in the H8S/2695.
Only a 0 may be written to RMTS2, RMTS1, or RMTS0.
Bit 2 Bit 1 Bit 0
RMTS2 RMTS1 RMTS0
0 0 0
1
1 0
1
1 1 1
Note: When all areas selected in DRAM are 8-bit space, the PF2 pin can be used as an I/O port
and for BREQO and WAIT. When contiguous RAM is selected set the appropriate bus width
and number of access states (the number of programmable waits) to the same values for all
of areas 2 to 5. Do not set other than the above combinations.
Area 5 Area 4
Normal space Normal space
Normal space Normal space
Normal space Normal space
DRAM space DRAM space
Contiguous Contiguous
DRAM space DRAM space
Description
Area 3
Normal space
Normal space
DRAM space
DRAM space
Contiguous
DRAM space
(Initial value)
Area 2
Normal space
DRAM space
DRAM space
DRAM space
Contiguous
DRAM space
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