7.3 Pin Functions - Renesas H8S/2633 Series Hardware Manual

10B.7.3 Pin Functions
Modes 4 to 6: In modes 4 to 6, port A pins function as address outputs according to the setting of
AE3 to AE0 in PFCR; when they do not function as address outputs, the pins function as SCI I/O
pins and I/O ports.
Port A pin functions in modes 4 to 6 are shown in figure 10B-7.
Mode 7: In mode 7, port A pins function as I/O ports and SCI2 I/O pins (SCK2, TxD2, and
RxD2). Input or output can be specified for each pin on an individual bit basis. Setting a PADDR
bit to 1 makes the corresponding port A pin an output port, while clearing the bit to 0 makes the
pin an input port.
Port A pin functions are shown in figure 10B-8.
476
PA3 (I/O) / A19 (output) / SCK2 (I/O)
PA2 (I/O) / A18 (output) / RxD2 (input)
Port A
PA1 (I/O) / A17 (output) / TxD2 (output)
PA0 (I/O) / A16 (output)
Figure 10B-7 Port A Pin Functions (Modes 4 to 6)
Port A
Figure 10B-8 Port A Pin Functions (Mode 7)
PA3 (I/O) / SCK2 (I/O)
PA2 (I/O) / RxD2 (input)
PA1 (I/O) / TxD2 (output)
PA0 (I/O)