Renesas H8S/2633 Series Hardware Manual page 49

22.8.1 Hardware Protection............................................................................................ 931
22.8.2 Software Protection ............................................................................................. 932
22.8.3 Error Protection ................................................................................................... 933
22.9 Flash Memory Emulation in RAM................................................................................... 935
22.10 Interrupt Handling when Programming/Erasing Flash Memory ...................................... 937
22.11 Flash Memory Programmer Mode ................................................................................... 937
22.11.1 Socket Adapter Pin Correspondence Diagram .................................................... 938
22.11.2 Programmer Mode Operation.............................................................................. 940
22.11.3 Memory Read Mode............................................................................................ 941
22.11.4 Auto-Program Mode ........................................................................................... 944
22.11.5 Auto-Erase Mode................................................................................................. 946
22.11.6 Status Read Mode................................................................................................ 948
22.11.7 Status Polling....................................................................................................... 949
22.11.8 Programmer Mode Transition Time.................................................................... 949
22.11.9 Notes on Memory Programming......................................................................... 950
22.12 Flash Memory and Power-Down States ........................................................................... 951
22.12.1 Note on Power-Down States ............................................................................... 951
22.13 Flash Memory Programming and Erasing Precautions .................................................... 952
22.14 Note on Switching from F-ZTAT Version to Mask ROM Version ................................. 957
Section 23A Clock Pulse Generator
(H8S/2633, H8S/2632, H8S/2631, H8S/2633F)
23A.1 Overview ......................................................................................................................... 959
23A.1.1 Block Diagram................................................................................................. 959
23A.1.2 Register Configuration .................................................................................... 960
23A.2 Register Descriptions....................................................................................................... 960
23A.2.1 System Clock Control Register (SCKCR) ...................................................... 960
23A.2.2 Low-Power Control Register (LPWRCR)....................................................... 961
23A.3 Oscillator ......................................................................................................................... 962
23A.3.1 Connecting a Crystal Resonator ...................................................................... 962
23A.3.2 External Clock Input ....................................................................................... 965
23A.4 PLL Circuit...................................................................................................................... 967
23A.5 Medium-Speed Clock Divider......................................................................................... 967
23A.6 Bus Master Clock Selection Circuit ................................................................................ 967
23A.7 Subclock Oscillator ......................................................................................................... 968
23A.8 Subclock Waveform Shaping Circuit.............................................................................. 969
23A.9 Note on Crystal Resonator............................................................................................... 969
Section 23B Clock Pulse Generator (H8S/2633R, H8S/2695)
23B.1 Overview ......................................................................................................................... 971
23B.1.1 Block Diagram................................................................................................. 971
23B.1.2 Register Configuration .................................................................................... 972
23B.2 Register Descriptions....................................................................................................... 972
.............................. 959
............................. 971
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