Renesas H8S/2633 Series Hardware Manual page 984

Increment
address
Notes: *1 Preprogramming (setting erase block data to all "0") is not necessary.
*2 Verify data is read in 16-bit (word) units.
*3 Set only one bit in EBR1 and 2. More than 2 bits cannot be set.
*4 Erasing is performed in block units. To erase a number of blocks, each block must be erased in turn.
930
Start
*1
Set SWE1 bit in FLMCR1
Wait (x) µs
n = 1
Set EBR1 and 2
Enable WDT
Set ESU1 bit in FLMCR1
Wait (y) µs
Set E1 bit in FLMCR1
Wait (z) ms
Clear E1 bit in FLMCR1
Wait (α) µs
Clear ESU1 bit in FLMCR1
Wait (β) µs
Disable WDT
Set EV1 bit in FLMCR1
Wait (γ) µs
Set block start address to verify address
H'FF dummy write to verify address
Wait (ε) µs
Read verify data
Verify data = all "1"?
OK
NG
Last address of block?
OK
Clear EV1 bit in FLMCR1
Wait (η) µs
*4
End of
NG
erasing of all erase
blocks?
OK
Clear SWE1 bit in FLMCR1
Wait (× 1) µs
End of erasing
Figure 22-13 Erase/Erase-Verify Flowchart
*3
Start erase
Halt erase
*2
NG
Clear EV1 bit in FLMCR1
Wait (η) µs
n ≥ (N)?
OK
Clear SWE1 bit in FLMCR1
Wait (× 1) µs
Erase failure
n ← n + 1
NG