Renesas H8S/2633 Series Hardware Manual page 607

Examples of 8-bit register access operation are shown in figures 11-3, 11-4, and 11-5.
Internal data bus
H
Bus
L
master
Figure 11-3 8-Bit Register Access Operation [Bus Master ↔ TCR (Upper 8 Bits)]
Internal data bus
H
Bus
L
master
Figure 11-4 8-Bit Register Access Operation [Bus Master ↔ TMDR (Lower 8 Bits)]
Internal data bus
H
Bus
L
master
Figure 11-5 8-Bit Register Access Operation [Bus Master ↔ TCR and TMDR (16 Bits)]
Bus interface
Bus interface
Bus interface
TCR
TMDR
TCR TMDR
Module
data bus
Module
data bus
Module
data bus
553