Renesas H8S/2633 Series Hardware Manual page 847

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requests, and receive data full interrupt (RXI) requests. The transmit end interrupt (TEI) request is
not used in this mode.
When the TEND flag in SSR is set to 1, a TXI interrupt request is generated.
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated.
When any of flags ORER, PER, and ERS in SSR is set to 1, an ERI interrupt request is generated.
The relationship between the operating states and interrupt sources is shown in table 17-8.
Note: For block transfer mode, see section 16.4, SCI Interrupts.
Table 17-8 Smart Card Mode Operating States and Interrupt Sources
Operating State
Transmit
Normal
Mode
operation
Error
Receive
Normal
Mode
operation
Error
Data Transfer Operation by DMAC * or DTC * : In smart card mode, as with the normal SCI,
transfer can be carried out using the DMAC* or DTC*. In a transmit operation, the TDRE flag is
also set to 1 at the same time as the TEND flag in SSR, and a TXI interrupt is generated. If the
TXI request is designated beforehand as a DMAC* or DTC* activation source, the DMAC* or
DTC* will be activated by the TXI request, and transfer of the transmit data will be carried out.
The TDRE and TEND flags are automatically cleared to 0 when data transfer is performed by the
DMAC* or DTC*. In the event of an error, the SCI retransmits the same data automatically.
During this period, TEND remains cleared to 0 and the DMAC* is not activated. Therefore, the
SCI and DMAC* will automatically transmit the specified number of bytes, including
retransmission in the event of an error. However, the ERS flag is not cleared automatically when
an error occurs, and so the RIE bit should be set to 1 beforehand so that an ERI request will be
generated in the event of an error, and the ERS flag will be cleared.
When performing transfer using the DMAC* or DTC*, it is essential to set and enable the
DMAC* or DTC* before carrying out SCI setting. For details of the DMAC* or DTC* setting
procedures, see section 8, DMA Controller (DMAC*) and section 9, Data Transfer Controller
(DTC*).
In a receive operation, an RXI interrupt request is generated when the RDRF flag in SSR is set to
1. If the RXI request is designated beforehand as a DMAC* or DTC* activation source, the
DMAC* or DTC* will be activated by the RXI request, and transfer of the receive data will be
Flag
Enable Bit
TEND
TIE
ERS
RIE
RDRF
RIE
PER, ORER
RIE
Interrupt
DMAC
Source
Activation
TXI
Possible
ERI
Not possible
RXI
Possible
ERI
Not possible
DTC Activation
Possible
Not possible
Possible
Not possible
793

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