Section 22 Rom; Overview; Block Diagram; Register Configuration - Renesas H8S/2633 Series Hardware Manual

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The H8/2633 Series has 256 kbytes of on-chip flash memory, or 256, 192, or 128 kbytes of on-

chip mask ROM, the H8S/2633 and H8S/2633R have 256 kbytes of flash memory, and the

H8S/2695 has 192 kbytes of mask ROM. The ROM is connected to the bus master via a 16-bit

data bus, enabling both byte and word data to be accessed in one state. Instruction fetching is thus

speeded up, and processing speed increased.

The on-chip ROM is enabled and disabled by setting the mode pins (MD2, MD1, and MD0).

The flash memory version can be erased and programmed on-board, as well as with a special-

purpose PROM programmer.

Figure 22-1 shows a block diagram of 256-kbyte ROM.

The H8/2633 Series operating mode is controlled by the mode pins and the MDCR register. The

Section 22 ROM

Internal data bus (upper 8 bits)

Internal data bus (lower 8 bits)

Figure 22-1 Block Diagram of ROM (256 kbytes)