Renesas H8S/2633 Series Hardware Manual page 24

Hide thumbs Also See for H8S/2633 Series:
Table of Contents

Advertisement

Section
A.2 Instruction Codes 1137 to
B.1A Addresses
(H8S/2633 Series,
H8S/2633F,
H8S/2633R)
B.1B Addresses
(H8S/2695)
B.2 Functions
Appendix C I/O Port
Block Diagrams
16
Page
Item
Table A-2 Instruction Codes
1144
1184
1193
1194 to
1200
1215
SSR0—Serial Status Register
0 to SSR4—Serial Status
Register 4
1217
SBYCR—Standby Control
Register
1218
SYSCR—System Control
Register
1222
PFCR—Pin Function Control
Register
1223
LPWRCR—Low-Power Control
Register
1258
TSR1—Timer Status Register
1 to TSR5—Timer Status
Register 5
1260, 1265 IPRA to IPRO, BCRL—Bus
Control Register L
1266 to
MCR, DRAMCR, RTCNT,
1268,
RTCOR, DMAWER, DMATCR,
1276 to
DMACR0A, DMACR0B,
1289
DMACR1A, DMACR1B,
DMABCR, ICCR0, ICCR1,
ICSR0, ICSR1, ICDR0, ICDR1,
SARX0, SARX1, ICMR0,
ICMR1, SAR0, and SAR1
1284
RSTCSR—Reset
Control/Status Register
1288
1292
TCSR1—Timer Control/Status
Register 1
1299
Description
CLRMAC, LDMAC, MAC,
SHAL, and STMAC
instructions amended
H8S/2633R added to
Addresses
Note added
Newly added
Bit table for SSR0 to SSR4
amended
Note *3 added
Note * added to standby
timer select 2 to 0 table
1 under SYSCR amended to
I
Note * added to BUZZ output
enable table
Note *1 added to bit table
Note *2 added
Note * added
Descriptions added
TCNT amended to RSTCSR
in Note
ø = 28 MHz transfer rate for
bits 5 to 3 and note * added
Description added

Advertisement

Table of Contents
loading

Table of Contents