Pin Configuration; Register Configuration - Renesas H8S/2633 Series Hardware Manual

14.1.3

Pin Configuration

Table 14-1 lists the pins used by the PWM D/A module.
Table 14-1 Input and Output Pins
Name
PWM output pin 0
PWM output pin 1
PWM output pin 2
PWM output pin 3
14.1.4

Register Configuration

Table 14-2 lists the registers of the PWM D/A module.
Table 14-2 Register Configuration
Channel Name
0 PWM D/A control register 0
PWM D/A data register AH0
PWM D/A data register AL0
PWM D/A data register BH0
PWM D/A data register BL0
PWM D/A counter H0
PWM D/A counter L0
1 PWM D/A control register 1
PWM D/A data register AH1
PWM D/A data register AL1
PWM D/A data register BH1
PWM D/A data register BL1
PWM D/A counter H1
PWM D/A counter L1
All Module stop control register B
Notes: *1 Lower 16 bits of the address.
*2 The same addresses are shared by DADRA and DACR, and by DADRB and DACNT.
Switching is performed by the REGS bit in DACNT or DADRB.
Abbr. I/O
PWM0 Output
PWM1 Output
PWM2 Output
PWM3 Output
Abbreviation
DACR0
DADRAH0
DADRAL0
DADRBH0
DADRBL0
DACNTH0
DACNTL0
DACR1
DADRAH1
DADRAL1
DADRBH1
DADRBL1
DACNTH1
DACNTL1
MSTPCRB
Function
PWM output, channel 0A
PWM output, channel 0B
PWM output, channel 1A
PWM output, channel 1B
R/W Initial value Address*
R/W H'30
R/W H'FF
R/W H'FF
R/W H'FF
R/W H'FF
R/W H'00
R/W H'03
R/W H'30
R/W H'FF
R/W H'FF
R/W H'FF
R/W H'FF
R/W H'00
R/W H'03
R/W H'FF
1
2
H'FDB8*
2
H'FDB8*
2
H'FDB9*
2
H'FDBA*
2
H'FDBB*
2
H'FDBA*
2
H'FDBB*
2
H'FDBC*
2
H'FDBC*
2
H'FDBD*
2
H'FDBE*
2
H'FDBF*
2
H'FDBE*
2
H'FDBF*
H'FDE9
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