Renesas H8S/2633 Series Hardware Manual page 817

TE bit
SCK output pin
TxD output pin
Port input/output
Port
Figure 16-26 Asynchronous Transmission Using Internal Clock
TE bit
SCK output pin
TxD output pin
Port input/output
Port
Note: * Initialized by software standby.
Figure 16-27 Synchronous Transmission Using Internal Clock
Start of transmission
High output Start
SCI TxD output
Start of transmission
Marking output
SCI TxD output
Transition
End of to software
transmission standby
Stop Port input/output
Transition
End of to software
transmission standby
Port input/output
Last TxD bit held Port input/output
Exit from
software
standby
Port input/output
High output
SCI TxD
Port
output
Exit from
software
standby
High output*
SCI TxD
Port
output
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