ST STM32L4+ Series Reference Manual page 2146

USB on-the-go full-speed (OTG_FS)
Bits 31:29 Reserved, must be kept at reset value.
Bits 28:27 AR: Access request
Bit 26 ADPTOIM: ADP timeout interrupt mask
Bit 25 ADPSNSIM: ADP sense interrupt mask
Bit 24 ADPPRBIM: ADP probe interrupt mask
Bit 23 ADPTOIF: ADP timeout interrupt flag
Bit 22 ADPSNSIF: ADP sense interrupt flag
Bit 21 ADPPRBIF: ADP probe interrupt flag
Bit 20 ADPEN: ADP enable
Bit 19 ADPRST: ADP reset
Bit 18 ENASNS: Enable sense
Bit 17 ENAPRB: Enable probe
Bits 16:6 RTIM: Ramp time
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This bitfield define the requested access mode to the OTG_GADPCTL register:
00 Read / write valid (updated by the core)
01 Read request
10 Write request
11 Reserved
When this bit is set, it unmasks the interrupt from ADPTOIF.
When this bit is set, it unmasks the interrupt from ADPSNSIF.
When this bit is set, it unmasks the interrupt from ADPPRBIF.
This bit is relevant only for an ADP probe. When this bit is set, it means that the ramp
time has completed (RTIM has reached its terminal value of 0x7FF). This is a debug
feature that allows the application to read the ramp time after each cycle.
When this bit is set, it means that the V
V is reached.
ADPSNS
When this bit is set, it means that the V
V is reached.
ADPPRB
When set, the core performs either ADP probing or sensing based on ENAPRB or
ENASNS.
When set, ADP controller is reset. This bit is auto-cleared after the reset procedure is
complete in the ADP controller.
When programmed to 1, the core performs a sense operation.
When programmed to 1, the core performs a probe operation.
These bits capture the latest time it took for V
bits are defined in units of 32 kHz clock cycles as follow:
000: 1 cycle
001: 2 cycles
002: 3 cycles
...
7FF: 2048 cycles
A time of 1024 cycles at 32 kHz corresponds to a time of 32 ms.
voltage is greater than V
BUS
voltage is greater than V
BUS
to ramp from V
BUS
RM0432 Rev 6
RM0432
value or that
ADPSNS
or that
ADPPRB
to V . The
ADPSINK ADPPRB