ST STM32L4+ Series Reference Manual page 2271

RM0432
57.17 TPIU (trace port interface unit)
57.17.1 Introduction
The TPIU acts as a bridge between the on-chip trace data from the ITM and the ETM.
The output data stream encapsulates the trace source ID, that is then captured by a trace
port analyzer (TPA).
The core embeds a simple TPIU, especially designed for low-cost debug (consisting of a
special version of the CoreSight TPIU).
57.17.2 TRACE pin assignment
•
Asynchronous mode
The asynchronous mode requires 1 extra pin and is available on all packages. It is only
available if using Serial Wire mode (not in JTAG mode).
TPIU pin name
TRACESWO
•
Synchronous mode
The synchronous mode requires from two to six extra pins depending on the data trace
size and is only available in the larger packages. In addition it is available in JTAG
mode and in Serial-wire mode and provides better bandwidth output capabilities than
asynchronous trace.
Figure 645. TPIU block diagram
Table 436. Asynchronous TRACE pin assignment
Trace synchronous mode
Type
O TRACE Asynchronous data output
RM0432 Rev 6
Debug support (DBG)
Description
STM32L4+ Series
pin assignment
PB3
2271/2301
2278