Data Memory Controller Interconnect To Other Banks (Tms320C6201 Revision 2) - Texas Instruments TMS320C6201 Reference Manual

Internal Data Memory Organization
Figure 2–4. Data Memory Controller Interconnect to Other Banks
(TMS320C6201 Revision 2)
Peripheral
bus
controller
2-10
'C6201 CPU
Side B
32 32
Data memory controller
(DMEMC)
32 32
External
memory
interface
Side A
32 32
64 K bytes
16
16
16
16
32
DMA
controller
Bank 3
Bank 2
Bank 1
Bank 0